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@@ -31,7 +31,15 @@
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#endif
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#if STM32_ADCV3_OVERSAMPLING
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-# error "STM32 ADCV3 Oversampling is not supported at this time."
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+// Apparently all ADCV3 chips that support oversampling (STM32L4xx, STM32L4xx+,
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+// STM32G4xx, STM32WB[35]x) have errata like “Wrong ADC result if conversion
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+// done late after calibration or previous conversion”; the workaround is to
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+// perform a dummy conversion and discard its result. STM32G4xx chips also
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+// have the “ADC channel 0 converted instead of the required ADC channel”
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+// errata, one workaround for which is also to perform a dummy conversion.
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+# define ADC_DUMMY_CONVERSIONS_AT_START 1
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+#else
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+# define ADC_DUMMY_CONVERSIONS_AT_START 0
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#endif
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// Otherwise assume V3
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@@ -76,8 +84,10 @@
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#ifndef ADC_COUNT
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# if defined(RP2040) || defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx)
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# define ADC_COUNT 1
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-# elif defined(STM32F3XX)
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+# elif defined(STM32F3XX) || defined(STM32G4XX)
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# define ADC_COUNT 4
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+# elif defined(STM32L4XX)
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+# define ADC_COUNT 3
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# else
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# error "ADC_COUNT has not been set for this ARM microcontroller."
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# endif
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@@ -89,13 +99,24 @@
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# error "The ARM ADC implementation currently only supports reading one channel at a time."
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#endif
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+// Add dummy conversions as extra channels (this would work only on chips that
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+// have multiple channel index fields instead of a channel mask, but all chips
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+// that need that workaround are like that).
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+#define ADC_TOTAL_CHANNELS (ADC_DUMMY_CONVERSIONS_AT_START + ADC_NUM_CHANNELS)
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+
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#ifndef ADC_BUFFER_DEPTH
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# define ADC_BUFFER_DEPTH 1
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#endif
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// For more sampling rate options, look at hal_adc_lld.h in ChibiOS
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-#ifndef ADC_SAMPLING_RATE
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-# define ADC_SAMPLING_RATE ADC_SMPR_SMP_1P5
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+#if !defined(ADC_SAMPLING_RATE) && !defined(RP2040)
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+# if defined(ADC_SMPR_SMP_1P5)
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+# define ADC_SAMPLING_RATE ADC_SMPR_SMP_1P5
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+# elif defined(ADC_SMPR_SMP_2P5) // STM32L4XX, STM32L4XXP, STM32G4XX, STM32WBXX
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+# define ADC_SAMPLING_RATE ADC_SMPR_SMP_2P5
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+# else
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+# error "Cannot determine the default ADC_SAMPLING_RATE for this MCU."
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+# endif
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#endif
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// Options are 12, 10, 8, and 6 bit.
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@@ -108,7 +129,7 @@
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#endif
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static ADCConfig adcCfg = {};
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-static adcsample_t sampleBuffer[ADC_NUM_CHANNELS * ADC_BUFFER_DEPTH];
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+static adcsample_t sampleBuffer[ADC_TOTAL_CHANNELS * ADC_BUFFER_DEPTH];
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// Initialize to max number of ADCs, set to empty object to initialize all to false.
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static bool adcInitialized[ADC_COUNT] = {};
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@@ -116,7 +137,7 @@ static bool adcInitialized[ADC_COUNT] = {};
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// TODO: add back TR handling???
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static ADCConversionGroup adcConversionGroup = {
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.circular = FALSE,
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- .num_channels = (uint16_t)(ADC_NUM_CHANNELS),
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+ .num_channels = (uint16_t)(ADC_TOTAL_CHANNELS),
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#if defined(USE_ADCV1)
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.cfgr1 = ADC_CFGR1_CONT | ADC_RESOLUTION,
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.smpr = ADC_SAMPLING_RATE,
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@@ -240,6 +261,74 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) {
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case C5: return TO_MUX( ADC_CHANNEL_IN15, 0 );
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// STM32F103x[C-G] in 144-pin packages also have analog inputs on F6...F10, but they are on ADC3, and the
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// ChibiOS ADC driver for STM32F1xx currently supports only ADC1, therefore these pins are not usable.
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+#elif defined(STM32L4XX)
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+ case A0: return TO_MUX( ADC_CHANNEL_IN5, 0 ); // Can also be ADC2 in some cases
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+ case A1: return TO_MUX( ADC_CHANNEL_IN6, 0 ); // Can also be ADC2 in some cases
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+ case A2: return TO_MUX( ADC_CHANNEL_IN7, 0 ); // Can also be ADC2
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+ case A3: return TO_MUX( ADC_CHANNEL_IN8, 0 ); // Can also be ADC2
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+ case A4: return TO_MUX( ADC_CHANNEL_IN9, 0 ); // Can also be ADC2
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+ case A5: return TO_MUX( ADC_CHANNEL_IN10, 0 ); // Can also be ADC2
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+ case A6: return TO_MUX( ADC_CHANNEL_IN11, 0 ); // Can also be ADC2
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+ case A7: return TO_MUX( ADC_CHANNEL_IN12, 0 ); // Can also be ADC2
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+ case B0: return TO_MUX( ADC_CHANNEL_IN15, 0 ); // Can also be ADC2
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+ case B1: return TO_MUX( ADC_CHANNEL_IN16, 0 ); // Can also be ADC2
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+ case C0: return TO_MUX( ADC_CHANNEL_IN1, 0 ); // Can also be ADC2 or ADC3
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+ case C1: return TO_MUX( ADC_CHANNEL_IN2, 0 ); // Can also be ADC2 or ADC3
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+ case C2: return TO_MUX( ADC_CHANNEL_IN3, 0 ); // Can also be ADC2 or ADC3
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+ case C3: return TO_MUX( ADC_CHANNEL_IN4, 0 ); // Can also be ADC2 or ADC3
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+ case C4: return TO_MUX( ADC_CHANNEL_IN13, 0 ); // Can also be ADC2
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+ case C5: return TO_MUX( ADC_CHANNEL_IN14, 0 ); // Can also be ADC2
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+# if STM32_HAS_GPIOF && STM32_ADC_USE_ADC3
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+ case F3: return TO_MUX( ADC_CHANNEL_IN6, 2 );
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+ case F4: return TO_MUX( ADC_CHANNEL_IN7, 2 );
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+ case F5: return TO_MUX( ADC_CHANNEL_IN8, 2 );
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+ case F6: return TO_MUX( ADC_CHANNEL_IN9, 2 );
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+ case F7: return TO_MUX( ADC_CHANNEL_IN10, 2 );
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+ case F8: return TO_MUX( ADC_CHANNEL_IN11, 2 );
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+ case F9: return TO_MUX( ADC_CHANNEL_IN12, 2 );
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+ case F10: return TO_MUX( ADC_CHANNEL_IN13, 2 );
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+# endif
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+#elif defined(STM32G4XX)
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+ case A0: return TO_MUX( ADC_CHANNEL_IN1, 0 ); // Can also be ADC2
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+ case A1: return TO_MUX( ADC_CHANNEL_IN2, 0 ); // Can also be ADC2
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+ case A2: return TO_MUX( ADC_CHANNEL_IN3, 0 );
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+ case A3: return TO_MUX( ADC_CHANNEL_IN4, 0 );
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+ case A4: return TO_MUX( ADC_CHANNEL_IN17, 1 );
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+ case A5: return TO_MUX( ADC_CHANNEL_IN13, 1 );
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+ case A6: return TO_MUX( ADC_CHANNEL_IN3, 1 );
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+ case A7: return TO_MUX( ADC_CHANNEL_IN4, 1 );
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+ case B0: return TO_MUX( ADC_CHANNEL_IN15, 0 ); // Can also be ADC3
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+ case B1: return TO_MUX( ADC_CHANNEL_IN12, 0 ); // Can also be ADC3
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+ case B2: return TO_MUX( ADC_CHANNEL_IN12, 1 );
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+ case B11: return TO_MUX( ADC_CHANNEL_IN14, 0 ); // Can also be ADC2
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+ case B12: return TO_MUX( ADC_CHANNEL_IN11, 0 ); // Can also be ADC4
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+ case B13: return TO_MUX( ADC_CHANNEL_IN5, 2 );
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+ case B14: return TO_MUX( ADC_CHANNEL_IN5, 0 ); // Can also be ADC4
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+ case B15: return TO_MUX( ADC_CHANNEL_IN15, 1 ); // Can also be ADC4
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+ case C0: return TO_MUX( ADC_CHANNEL_IN6, 0 ); // Can also be ADC2
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+ case C1: return TO_MUX( ADC_CHANNEL_IN7, 0 ); // Can also be ADC2
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+ case C2: return TO_MUX( ADC_CHANNEL_IN8, 0 ); // Can also be ADC2
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+ case C3: return TO_MUX( ADC_CHANNEL_IN9, 0 ); // Can also be ADC2
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+ case C4: return TO_MUX( ADC_CHANNEL_IN5, 1 );
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+ case C5: return TO_MUX( ADC_CHANNEL_IN11, 1 );
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+ case D8: return TO_MUX( ADC_CHANNEL_IN12, 3 );
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+ case D9: return TO_MUX( ADC_CHANNEL_IN13, 3 );
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+ case D10: return TO_MUX( ADC_CHANNEL_IN7, 2 ); // Can also be ADC4
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+ case D11: return TO_MUX( ADC_CHANNEL_IN8, 2 ); // Can also be ADC4
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+ case D12: return TO_MUX( ADC_CHANNEL_IN9, 2 ); // Can also be ADC4
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+ case D13: return TO_MUX( ADC_CHANNEL_IN10, 2 ); // Can also be ADC4
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+ case D14: return TO_MUX( ADC_CHANNEL_IN11, 2 ); // Can also be ADC4
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+ case E5: return TO_MUX( ADC_CHANNEL_IN2, 3 );
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+ case E7: return TO_MUX( ADC_CHANNEL_IN4, 2 );
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+ case E8: return TO_MUX( ADC_CHANNEL_IN6, 2 ); // Can also be ADC4
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+ case E9: return TO_MUX( ADC_CHANNEL_IN2, 2 );
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+ case E10: return TO_MUX( ADC_CHANNEL_IN14, 2 ); // Can also be ADC4
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+ case E11: return TO_MUX( ADC_CHANNEL_IN15, 2 ); // Can also be ADC4
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+ case E12: return TO_MUX( ADC_CHANNEL_IN16, 2 ); // Can also be ADC4
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+ case E13: return TO_MUX( ADC_CHANNEL_IN3, 2 );
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+ case E14: return TO_MUX( ADC_CHANNEL_IN1, 3 );
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+ case F0: return TO_MUX( ADC_CHANNEL_IN10, 0 );
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+ case F1: return TO_MUX( ADC_CHANNEL_IN10, 1 );
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#elif defined(RP2040)
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case 26U: return TO_MUX(0, 0);
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case 27U: return TO_MUX(1, 0);
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@@ -306,7 +395,11 @@ int16_t adc_read(adc_mux mux) {
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#elif defined(RP2040)
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adcConversionGroup.channel_mask = 1 << mux.input;
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#else
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- adcConversionGroup.sqr[0] = ADC_SQR1_SQ1_N(mux.input);
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+ adcConversionGroup.sqr[0] = ADC_SQR1_SQ1_N(mux.input)
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+# if ADC_DUMMY_CONVERSIONS_AT_START >= 1
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+ | ADC_SQR1_SQ2_N(mux.input)
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+# endif
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+ ;
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#endif
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ADCDriver* targetDriver = intToADCDriver(mux.adc);
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@@ -321,9 +414,9 @@ int16_t adc_read(adc_mux mux) {
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#if defined(USE_ADCV2) || defined(RP2040)
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// fake 12-bit -> N-bit scale
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- return (*sampleBuffer) >> (12 - ADC_RESOLUTION);
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+ return (sampleBuffer[ADC_DUMMY_CONVERSIONS_AT_START]) >> (12 - ADC_RESOLUTION);
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#else
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// already handled as part of adcConvert
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- return *sampleBuffer;
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+ return sampleBuffer[ADC_DUMMY_CONVERSIONS_AT_START];
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#endif
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}
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Cipulot