board_st7565.h 3.2 KB

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  1. /*
  2. * This file is subject to the terms of the GFX License. If a copy of
  3. * the license was not distributed with this file, you can obtain one at:
  4. *
  5. * http://ugfx.org/license.html
  6. */
  7. #pragma once
  8. #define ST7565_LCD_BIAS ST7565_LCD_BIAS_9 // actually 6
  9. #define ST7565_ADC ST7565_ADC_NORMAL
  10. #define ST7565_COM_SCAN ST7565_COM_SCAN_DEC
  11. #define ST7565_PAGE_ORDER 0,1,2,3
  12. /*
  13. * Custom page order for several LCD boards, e.g. HEM12864-99
  14. * #define ST7565_PAGE_ORDER 4,5,6,7,0,1,2,3
  15. */
  16. #define ST7565_GPIOPORT GPIOC
  17. #define ST7565_PORT PORTC
  18. #define ST7565_A0_PIN 7
  19. #define ST7565_RST_PIN 8
  20. #define ST7565_MOSI_PIN 6
  21. #define ST7565_SLCK_PIN 5
  22. #define ST7565_SS_PIN 4
  23. #define palSetPadModeRaw(portname, bits) \
  24. ST7565_PORT->PCR[ST7565_##portname##_PIN] = bits
  25. #define palSetPadModeNamed(portname, portmode) \
  26. palSetPadMode(ST7565_GPIOPORT, ST7565_##portname##_PIN, portmode)
  27. #define ST7565_SPI_MODE PORTx_PCRn_DSE | PORTx_PCRn_MUX(2)
  28. // DSPI Clock and Transfer Attributes
  29. // Frame Size: 8 bits
  30. // MSB First
  31. // CLK Low by default
  32. static const SPIConfig spi1config = {
  33. // Operation complete callback or @p NULL.
  34. .end_cb = NULL,
  35. //The chip select line port - when not using pcs.
  36. .ssport = ST7565_GPIOPORT,
  37. // brief The chip select line pad number - when not using pcs.
  38. .sspad=ST7565_SS_PIN,
  39. // SPI initialization data.
  40. .tar0 =
  41. SPIx_CTARn_FMSZ(7) // Frame size = 8 bytes
  42. | SPIx_CTARn_ASC(1) // After SCK Delay Scaler (min 50 ns) = 55.56ns
  43. | SPIx_CTARn_DT(0) // Delay After Transfer Scaler (no minimum)= 27.78ns
  44. | SPIx_CTARn_CSSCK(0) // PCS to SCK Delay Scaler (min 20 ns) = 27.78ns
  45. | SPIx_CTARn_PBR(0) // Baud Rate Prescaler = 2
  46. | SPIx_CTARn_BR(0) // Baud rate (min 50ns) = 55.56ns
  47. };
  48. static GFXINLINE void acquire_bus(GDisplay *g) {
  49. (void) g;
  50. // Only the LCD is using the SPI bus, so no need to acquire
  51. // spiAcquireBus(&SPID1);
  52. spiSelect(&SPID1);
  53. }
  54. static GFXINLINE void release_bus(GDisplay *g) {
  55. (void) g;
  56. // Only the LCD is using the SPI bus, so no need to release
  57. //spiReleaseBus(&SPID1);
  58. spiUnselect(&SPID1);
  59. }
  60. static GFXINLINE void init_board(GDisplay *g) {
  61. (void) g;
  62. palSetPadModeNamed(A0, PAL_MODE_OUTPUT_PUSHPULL);
  63. palSetPad(ST7565_GPIOPORT, ST7565_A0_PIN);
  64. palSetPadModeNamed(RST, PAL_MODE_OUTPUT_PUSHPULL);
  65. palSetPad(ST7565_GPIOPORT, ST7565_RST_PIN);
  66. palSetPadModeRaw(MOSI, ST7565_SPI_MODE);
  67. palSetPadModeRaw(SLCK, ST7565_SPI_MODE);
  68. palSetPadModeNamed(SS, PAL_MODE_OUTPUT_PUSHPULL);
  69. spiInit();
  70. spiStart(&SPID1, &spi1config);
  71. release_bus(g);
  72. }
  73. static GFXINLINE void post_init_board(GDisplay *g) {
  74. (void) g;
  75. }
  76. static GFXINLINE void setpin_reset(GDisplay *g, bool_t state) {
  77. (void) g;
  78. if (state) {
  79. palClearPad(ST7565_GPIOPORT, ST7565_RST_PIN);
  80. }
  81. else {
  82. palSetPad(ST7565_GPIOPORT, ST7565_RST_PIN);
  83. }
  84. }
  85. static GFXINLINE void enter_data_mode(GDisplay *g) {
  86. palSetPad(ST7565_GPIOPORT, ST7565_A0_PIN);
  87. }
  88. static GFXINLINE void enter_cmd_mode(GDisplay *g) {
  89. palClearPad(ST7565_GPIOPORT, ST7565_A0_PIN);
  90. }
  91. static GFXINLINE void write_data(GDisplay *g, uint8_t* data, uint16_t length) {
  92. (void) g;
  93. spiSend(&SPID1, length, data);
  94. }