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config.h 2.1 KB

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  1. #pragma once
  2. #include "config_common.h"
  3. #define VENDOR_ID 0x1234
  4. #define PRODUCT_ID 0x5678
  5. #define DEVICE_VER 0x0001
  6. #define MANUFACTURER QMK
  7. #define PRODUCT 108Key-Trackpoint
  8. #define DESCRIPTION A 108 key ANSI keyboard with a trackpoint and three mouse buttons
  9. #define MATRIX_ROWS 8
  10. #define MATRIX_COLS 23
  11. #ifdef PS2_USE_USART
  12. #define PS2_CLOCK_PORT PORTD
  13. #define PS2_CLOCK_PIN PIND
  14. #define PS2_CLOCK_DDR DDRD
  15. #define PS2_CLOCK_BIT 5
  16. #define PS2_DATA_PORT PORTD
  17. #define PS2_DATA_PIN PIND
  18. #define PS2_DATA_DDR DDRD
  19. #define PS2_DATA_BIT 2
  20. /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
  21. /* set DDR of CLOCK as input to be slave */
  22. #define PS2_USART_INIT() do { \
  23. PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
  24. PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
  25. UCSR1C = ((1 << UMSEL10) | \
  26. (3 << UPM10) | \
  27. (0 << USBS1) | \
  28. (3 << UCSZ10) | \
  29. (0 << UCPOL1)); \
  30. UCSR1A = 0; \
  31. UBRR1H = 0; \
  32. UBRR1L = 0; \
  33. } while (0)
  34. #define PS2_USART_RX_INT_ON() do { \
  35. UCSR1B = ((1 << RXCIE1) | \
  36. (1 << RXEN1)); \
  37. } while (0)
  38. #define PS2_USART_RX_POLL_ON() do { \
  39. UCSR1B = (1 << RXEN1); \
  40. } while (0)
  41. #define PS2_USART_OFF() do { \
  42. UCSR1C = 0; \
  43. UCSR1B &= ~((1 << RXEN1) | \
  44. (1 << TXEN1)); \
  45. } while (0)
  46. #define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
  47. #define PS2_USART_RX_DATA UDR1
  48. #define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
  49. #define PS2_USART_RX_VECT USART1_RX_vect
  50. #endif
  51. #define MATRIX_ROW_PINS { B0, B1, B2, B3, B4, B5, B6, B7 }
  52. #define MATRIX_COL_PINS { C0, C1, C2, C3, C4, C5, C6, C7, D0, D1, F0, D3, D4, F1, D6, D7, E0, E1, E2, E3, E4, E5, E6 }
  53. #define UNUSED_PINS
  54. /* COL2ROW or ROW2COL */
  55. #define DIODE_DIRECTION COL2ROW
  56. #define DEBOUNCING_DELAY 5
  57. #define LOCKING_SUPPORT_ENABLE
  58. #define LOCKING_RESYNC_ENABLE