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+/* Copyright 2017 Jason Williams
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+ *
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+ * This program is free software: you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation, either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
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+ */
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+
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+#include "is31fl3731.h"
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+#include <avr/interrupt.h>
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+#include <avr/io.h>
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+#include <util/delay.h>
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+#include <string.h>
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+#include "TWIlib.h"
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+#include "progmem.h"
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+
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+// This is a 7-bit address, that gets left-shifted and bit 0
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+// set to 0 for write, 1 for read (as per I2C protocol)
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+// The address will vary depending on your wiring:
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+// 0b1110100 AD <-> GND
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+// 0b1110111 AD <-> VCC
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+// 0b1110101 AD <-> SCL
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+// 0b1110110 AD <-> SDA
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+#define ISSI_ADDR_DEFAULT 0x74
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+
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+#define ISSI_REG_CONFIG 0x00
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+#define ISSI_REG_CONFIG_PICTUREMODE 0x00
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+#define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08
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+#define ISSI_REG_CONFIG_AUDIOPLAYMODE 0x18
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+
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+#define ISSI_CONF_PICTUREMODE 0x00
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+#define ISSI_CONF_AUTOFRAMEMODE 0x04
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+#define ISSI_CONF_AUDIOMODE 0x08
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+
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+#define ISSI_REG_PICTUREFRAME 0x01
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+
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+#define ISSI_REG_SHUTDOWN 0x0A
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+#define ISSI_REG_AUDIOSYNC 0x06
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+
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+#define ISSI_COMMANDREGISTER 0xFD
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+#define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine'
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+
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+// Transfer buffer for TWITransmitData()
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+uint8_t g_twi_transfer_buffer[TXMAXBUFLEN];
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+
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+// These buffers match the IS31FL3731 PWM registers 0x24-0xB3.
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+// Storing them like this is optimal for I2C transfers to the registers.
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+// We could optimize this and take out the unused registers from these
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+// buffers and the transfers in IS31FL3731_write_pwm_buffer() but it's
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+// probably not worth the extra complexity.
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+uint8_t g_pwm_buffer[DRIVER_COUNT][144];
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+bool g_pwm_buffer_update_required = false;
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+
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+uint8_t g_led_control_registers[DRIVER_COUNT][18] = { { 0 }, { 0 } };
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+bool g_led_control_registers_update_required = false;
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+
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+
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+typedef struct
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+{
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+ uint8_t red_register;
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+ uint8_t red_bit;
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+ uint8_t green_register;
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+ uint8_t green_bit;
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+ uint8_t blue_register;
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+ uint8_t blue_bit;
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+} led_control_bitmask;
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+
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+// This is the bit pattern in the LED control registers
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+// (for matrix A, add one to register for matrix B)
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+//
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+// reg - b7 b6 b5 b4 b3 b2 b1 b0
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+// 0x00 - R08,R07,R06,R05,R04,R03,R02,R01
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+// 0x02 - G08,G07,G06,G05,G04,G03,G02,R00
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+// 0x04 - B08,B07,B06,B05,B04,B03,G01,G00
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+// 0x06 - - , - , - , - , - ,B02,B01,B00
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+// 0x08 - - , - , - , - , - , - , - , -
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+// 0x0A - B17,B16,B15, - , - , - , - , -
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+// 0x0C - G17,G16,B14,B13,B12,B11,B10,B09
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+// 0x0E - R17,G15,G14,G13,G12,G11,G10,G09
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+// 0x10 - R16,R15,R14,R13,R12,R11,R10,R09
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+
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+const led_control_bitmask g_led_control_bitmask[18] =
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+{
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+ { 0x02, 0, 0x04, 0, 0x06, 0 }, // R00,G00,B00
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+ { 0x00, 0, 0x04, 1, 0x06, 1 }, // R01,G01,B01
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+ { 0x00, 1, 0x02, 1, 0x06, 2 }, // R02,G02,B02
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+ { 0x00, 2, 0x02, 2, 0x04, 2 }, // R03,G03,B03
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+ { 0x00, 3, 0x02, 3, 0x04, 3 }, // R04,G04,B04
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+ { 0x00, 4, 0x02, 4, 0x04, 4 }, // R05,G05,B05
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+ { 0x00, 5, 0x02, 5, 0x04, 5 }, // R06,G06,B06
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+ { 0x00, 6, 0x02, 6, 0x04, 6 }, // R07,G07,B07
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+ { 0x00, 7, 0x02, 7, 0x04, 7 }, // R08,G08,B08
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+
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+ { 0x10, 0, 0x0E, 0, 0x0C, 0 }, // R09,G09,B09
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+ { 0x10, 1, 0x0E, 1, 0x0C, 1 }, // R10,G10,B10
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+ { 0x10, 2, 0x0E, 2, 0x0C, 2 }, // R11,G11,B11
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+ { 0x10, 3, 0x0E, 3, 0x0C, 3 }, // R12,G12,B12
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+ { 0x10, 4, 0x0E, 4, 0x0C, 4 }, // R13,G13,B13
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+ { 0x10, 5, 0x0E, 5, 0x0C, 5 }, // R14,G14,B14
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+ { 0x10, 6, 0x0E, 6, 0x0A, 5 }, // R15,G15,B15
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+ { 0x10, 7, 0x0C, 6, 0x0A, 6 }, // R16,G16,B16
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+ { 0x0E, 7, 0x0C, 7, 0x0A, 7 }, // R17,G17,B17
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+};
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+
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+const uint8_t g_map_control_index_to_register[2][18][3] PROGMEM = {
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+ {
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+ {0x34, 0x44, 0x54}, // 00
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+ {0x24, 0x45, 0x55}, // 01
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+ {0x25, 0x35, 0x56}, // 02
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+ {0x26, 0x36, 0x46}, // 03
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+ {0x27, 0x37, 0x47}, // 04
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+ {0x28, 0x38, 0x48}, // 05
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+ {0x29, 0x39, 0x49}, // 06
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+ {0x2a, 0x3a, 0x4a}, // 07
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+ {0x2b, 0x3b, 0x4b}, // 08
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+
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+ {0xa4, 0x94, 0x84}, // 09
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+ {0xa5, 0x95, 0x85}, // 10
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+ {0xa6, 0x96, 0x86}, // 11
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+ {0xa7, 0x97, 0x87}, // 12
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+ {0xa8, 0x98, 0x88}, // 13
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+ {0xa9, 0x99, 0x89}, // 14
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+ {0xaa, 0x9a, 0x79}, // 15
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+ {0xab, 0x8a, 0x7a}, // 16
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+ {0x9b, 0x8b, 0x7b} // 17
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+ }, {
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+ {0x34 + 8, 0x44 + 8, 0x54 + 8}, // 00
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+ {0x24 + 8, 0x45 + 8, 0x55 + 8}, // 01
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+ {0x25 + 8, 0x35 + 8, 0x56 + 8}, // 02
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+ {0x26 + 8, 0x36 + 8, 0x46 + 8}, // 03
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+ {0x27 + 8, 0x37 + 8, 0x47 + 8}, // 04
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+ {0x28 + 8, 0x38 + 8, 0x48 + 8}, // 05
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+ {0x29 + 8, 0x39 + 8, 0x49 + 8}, // 06
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+ {0x2a + 8, 0x3a + 8, 0x4a + 8}, // 07
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+ {0x2b + 8, 0x3b + 8, 0x4b + 8}, // 08
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+
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+ {0xa4 + 8, 0x94 + 8, 0x84 + 8}, // 09
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+ {0xa5 + 8, 0x95 + 8, 0x85 + 8}, // 10
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+ {0xa6 + 8, 0x96 + 8, 0x86 + 8}, // 11
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+ {0xa7 + 8, 0x97 + 8, 0x87 + 8}, // 12
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+ {0xa8 + 8, 0x98 + 8, 0x88 + 8}, // 13
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+ {0xa9 + 8, 0x99 + 8, 0x89 + 8}, // 14
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+ {0xaa + 8, 0x9a + 8, 0x79 + 8}, // 15
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+ {0xab + 8, 0x8a + 8, 0x7a + 8}, // 16
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+ {0x9b + 8, 0x8b + 8, 0x7b + 8} // 17
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+}};
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+
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+void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data )
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+{
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+ g_twi_transfer_buffer[0] = (addr << 1) | 0x00;
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+ g_twi_transfer_buffer[1] = reg;
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+ g_twi_transfer_buffer[2] = data;
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+
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+ // Set the error code to have no relevant information
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+ TWIInfo.errorCode = TWI_NO_RELEVANT_INFO;
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+ // Continuously attempt to transmit data until a successful transmission occurs
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+ //while ( TWIInfo.errorCode != 0xFF )
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+ //{
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+ TWITransmitData( g_twi_transfer_buffer, 3, 0 );
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+ //}
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+}
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+
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+void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer )
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+{
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+ // assumes bank is already selected
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+
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+ // transmit PWM registers in 9 transfers of 16 bytes
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+ // g_twi_transfer_buffer[] is 20 bytes
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+
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+ // set the I2C address
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+ g_twi_transfer_buffer[0] = (addr << 1) | 0x00;
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+
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+ // iterate over the pwm_buffer contents at 16 byte intervals
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+ for ( int i = 0; i < 144; i += 16 )
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+ {
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+ // set the first register, e.g. 0x24, 0x34, 0x44, etc.
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+ g_twi_transfer_buffer[1] = 0x24 + i;
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+ // copy the data from i to i+15
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+ // device will auto-increment register for data after the first byte
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+ // thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer
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+ for ( int j = 0; j < 16; j++ )
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+ {
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+ g_twi_transfer_buffer[2 + j] = pwm_buffer[i + j];
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+ }
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+
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+ // Set the error code to have no relevant information
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+ TWIInfo.errorCode = TWI_NO_RELEVANT_INFO;
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+ // Continuously attempt to transmit data until a successful transmission occurs
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+ while ( TWIInfo.errorCode != 0xFF )
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+ {
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+ TWITransmitData( g_twi_transfer_buffer, 16 + 2, 0 );
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+ }
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+ }
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+}
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+
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+void IS31FL3731_init( uint8_t addr )
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+{
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+ // In order to avoid the LEDs being driven with garbage data
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+ // in the LED driver's PWM registers, first enable software shutdown,
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+ // then set up the mode and other settings, clear the PWM registers,
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+ // then disable software shutdown.
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+
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+ // select "function register" bank
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+ IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
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+
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+ // enable software shutdown
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+ IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x00 );
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+ // this delay was copied from other drivers, might not be needed
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+ _delay_ms( 10 );
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+
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+ // picture mode
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+ IS31FL3731_write_register( addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE );
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+ // display frame 0
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+ IS31FL3731_write_register( addr, ISSI_REG_PICTUREFRAME, 0x00 );
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+ // audio sync off
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+ IS31FL3731_write_register( addr, ISSI_REG_AUDIOSYNC, 0x00 );
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+
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+ // select bank 0
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+ IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
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+
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+ // turn off all LEDs in the LED control register
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+ for ( int i = 0x00; i <= 0x11; i++ )
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+ {
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+ IS31FL3731_write_register( addr, i, 0x00 );
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+ }
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+
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+ // turn off all LEDs in the blink control register (not really needed)
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+ for ( int i = 0x12; i <= 0x23; i++ )
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+ {
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+ IS31FL3731_write_register( addr, i, 0x00 );
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+ }
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+
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+ // set PWM on all LEDs to 0
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+ for ( int i = 0x24; i <= 0xB3; i++ )
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+ {
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+ IS31FL3731_write_register( addr, i, 0x00 );
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+ }
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+
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+ // select "function register" bank
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+ IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
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+
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+ // disable software shutdown
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+ IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x01 );
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+
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+ // select bank 0 and leave it selected.
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+ // most usage after initialization is just writing PWM buffers in bank 0
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+ // as there's not much point in double-buffering
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+ IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
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+}
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+
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+
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+void map_index_to_led( uint8_t index, is31_led *led ) {
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+ //led = , sizeof(struct is31_led));
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+ // led->driver = addr->driver;
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+ // led->matrix = addr->matrix;
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+ // led->modifier = addr->modifier;
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+ // led->control_index = addr->control_index;
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+ // led->matrix_co.raw = addr->matrix_co.raw;
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+ // led->driver = (pgm_read_byte(addr) >> 6) && 0b11;
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+ // led->matrix = (pgm_read_byte(addr) >> 4) && 0b1;
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+ // led->modifier = (pgm_read_byte(addr) >> 3) && 0b1;
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+ // led->control_index = pgm_read_byte(addr+1);
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+ // led->matrix_co.raw = pgm_read_byte(addr+2);
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+}
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+
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+void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue )
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+{
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+ if ( index >= 0 && index < DRIVER_LED_TOTAL )
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+ {
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+ is31_led led = g_is31_leds[index];
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+ //map_index_to_led(index, &led);
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+
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+ // Subtract 0x24 to get the second index of g_pwm_buffer
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+ g_pwm_buffer[led.driver][ pgm_read_byte(&g_map_control_index_to_register[led.matrix][led.control_index][0]) - 0x24] = red;
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+ g_pwm_buffer[led.driver][ pgm_read_byte(&g_map_control_index_to_register[led.matrix][led.control_index][1]) - 0x24] = green;
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+ g_pwm_buffer[led.driver][ pgm_read_byte(&g_map_control_index_to_register[led.matrix][led.control_index][2]) - 0x24] = blue;
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+ g_pwm_buffer_update_required = true;
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+ }
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+}
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+
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+void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue )
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+{
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+ for ( int i = 0; i < DRIVER_LED_TOTAL; i++ )
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+ {
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+ IS31FL3731_set_color( i, red, green, blue );
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+ }
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+}
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+
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+void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, bool blue )
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+{
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+ is31_led led = g_is31_leds[index];
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+ // map_index_to_led(index, &led);
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+
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+ led_control_bitmask bitmask = g_led_control_bitmask[led.control_index];
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+
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+ // Matrix A and B registers are interleaved.
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+ // Add 1 to Matrix A register to get Matrix B register
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+ if ( red )
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+ {
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+ g_led_control_registers[led.driver][bitmask.red_register+led.matrix] |= (1<<bitmask.red_bit);
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+ }
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+ else
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+ {
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+ g_led_control_registers[led.driver][bitmask.red_register+led.matrix] &= ~(1<<bitmask.red_bit);
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+ }
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+ if ( green )
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+ {
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+ g_led_control_registers[led.driver][bitmask.green_register+led.matrix] |= (1<<bitmask.green_bit);
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+ }
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+ else
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+ {
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+ g_led_control_registers[led.driver][bitmask.green_register+led.matrix] &= ~(1<<bitmask.green_bit);
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+ }
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+ if ( blue )
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+ {
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+ g_led_control_registers[led.driver][bitmask.blue_register+led.matrix] |= (1<<bitmask.blue_bit);
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+ }
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+ else
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+ {
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+ g_led_control_registers[led.driver][bitmask.blue_register+led.matrix] &= ~(1<<bitmask.blue_bit);
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+ }
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+
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+ g_led_control_registers_update_required = true;
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+
|
|
|
+
|
|
|
+}
|
|
|
+
|
|
|
+void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 )
|
|
|
+{
|
|
|
+ if ( g_pwm_buffer_update_required )
|
|
|
+ {
|
|
|
+ IS31FL3731_write_pwm_buffer( addr1, g_pwm_buffer[0] );
|
|
|
+ IS31FL3731_write_pwm_buffer( addr2, g_pwm_buffer[1] );
|
|
|
+ }
|
|
|
+ g_pwm_buffer_update_required = false;
|
|
|
+}
|
|
|
+
|
|
|
+void IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 )
|
|
|
+{
|
|
|
+ if ( g_led_control_registers_update_required )
|
|
|
+ {
|
|
|
+ for ( int i=0; i<18; i++ )
|
|
|
+ {
|
|
|
+ IS31FL3731_write_register(addr1, i, g_led_control_registers[0][i] );
|
|
|
+ IS31FL3731_write_register(addr2, i, g_led_control_registers[1][i] );
|
|
|
+ }
|
|
|
+ }
|
|
|
+}
|
|
|
+
|